| 摘要 |
<p>A DRAM having bi-level digit lines is fabricated on a silicon-on-insulator 'SOI' substrate (12). More specifically, the digit lines of each complimentary digit line pair are positioned on opposite sides of the SOI substrate. In one embodiment, digit lines are formed between memory cell capacitors (67,68), and in a second embodiment, digit lines are formed above the capacitors.</p> |
