发明名称 MULTI-LEVEL NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE
摘要 PROBLEM TO BE SOLVED: To improve writing, erasure and read characteristics in a non-volatile semiconductor memory device, employing an MOSFET in which floating gate electrodes are formed on the both sidewalls of the control gate electrode as a memory element. SOLUTION: A control gate electrode (122) is formed, so that one part thereof is extended upward from floating gate electrodes (124a and 124b) formed on the both sidewalls thereof, to cover the floating gate electrodes. Also source and drain regions (126a and 126b) are formed along the external boundaries of the floating gate electrodes (124a and 124b) so as to implant electric charges into two floating gate electrodes independently.
申请公布号 JP2002050703(A) 申请公布日期 2002.02.15
申请号 JP20000232657 申请日期 2000.08.01
申请人 HITACHI LTD;HITACHI ULSI SYSTEMS CO LTD 发明人 MANABE YUKIKO;OKUYAMA KOSUKE;OUCHI TOMOHIKO;TAKEUCHI TAKASHI
分类号 G11C11/56;G11C16/04;G11C16/26;G11C16/34;H01L21/28;H01L21/8247;H01L27/10;H01L27/105;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):H01L21/824 主分类号 G11C11/56
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