DATA SORT CIRCUIT AND MAGNETIC TIMING WAVE PIPELINED ADDER

摘要

PURPOSE: A data sort circuit and the magnetic timing wave pipelined adder are provided to improve the processing capability of the data by minimizing the delay time difference of every signal. CONSTITUTION: The data sort circuit(2) comprises a magnetic timing signal generator(21) and a latch(23). The magnetic timing signal generator creates the magnetic timing signal by detecting the latest bit signal among four bit data. The latch sorts and outputs each bit of the four bit data by regarding the magnetic timing signal as a clock. In addition, the magnetic timing wave pipelining technique does not need an extra external clock, an extra register, and an extra circuit for matching the delay time.