Data processor capable of handling an increased number of operation codes

摘要

A data processor is provided to increase the number of instructions it can handle, even with a large number of operands required for the instructions. The data processor comprises a decoding circuit (1) extracting bits (a1, a2) of an instruction as first operand fields and decoding an operation code, using the remaining bits (a4); an operand-field storage portion (3) including a first operand-field storage portion (3a) storing bits (a1, a2) obtained from the decoding circuit (1) via a selector (2), and a second operand-field storage portion (3b) storing a second operand field obtained on the basis of those bits (a2); and a data processing portion (5) receiving the first and the second operand fields from the operand-field storage portion (3) and processing data in registers designated by the first and the second operand fields.