| 摘要 |
PROBLEM TO BE SOLVED: To provide SRAM whose memory cell can be miniaturized and by which malfunction can be prevented. SOLUTION: Gate electrode layers 21a, 21b being a first layer, drain-drain connection layers 31a, 31b being a second layer and drain-gate connection layers 41a, 41b being a third layer are a conductive layer for flip flop. The drive transistors Q3, Q4 of one memory cell do not share the drive transistors Q3, Q4 of the other memory cell and an n-type source area 11a1. |
