| 摘要 |
PURPOSE: A method for manufacturing a flash memory cell is provided to program/erase a memory cell by using a low voltage like a power supply voltage, to improve a program/erase characteristic of the memory cell by increasing a coupling ratio, and to fabricate a device of a design rule of 0.25 micrometer by reducing the size of the memory cell. CONSTITUTION: A tunnel oxide layer(23) and an undoped polysilicon layer(24b) are sequentially formed on a semiconductor substrate(21) having a field oxide layer(22). Ions are implanted into the undoped polysilicon layer while the surface of the undoped polysilicon layer becomes amorphous. The surface of the doped polysilicon layer is removed to expose a silicon grain boundary. The doped polysilicon layer and the tunnel oxide layer are sequentially patterned to form a floating gate. A dielectric layer(25), a polysilicon layer(26a), a tungsten silicide layer(26b) and an anti-reflecting coating(ARC)(27) are sequentially formed on the entire surface. The ARC, the tungsten silicide layer, the polysilicon layer and the dielectric layer are sequentially patterned to form a control gate(26) composed of the polysilicon layer and the tungsten silicide layer on the dielectric layer. Impurity ions are implanted into the semiconductor substrate at both sides of the floating gate to form a source and a drain.
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