发明名称 VIDEO SIGNAL PROCESSING DEVICE
摘要 PURPOSE: To resolve defects such as freeze of an image and block noise when non standard signal is inputted to an image compression circuit in a MPEG encoder, etc. CONSTITUTION: A time base correction circuit 15 stores an input signal to a memory 6 and reads the stored signal in timing delayed for a predetermined time from V synchronization of the nut signal. The circuit 15 resets a reading synchronization generating circuit 9 at each input field. The reset location proceeds 3 H or 10 H from V synchronization for reading. The circuit 15 detects if the input signal is non interlaced signal and field length deviates from standard value and then corrects odd or even order of a synchronization signal and timing of synchronization. If the input signal is a nonstandard signal, the circuit 15 provides a switch 18 which bypass image compression circuits 16, 17.
申请公布号 KR20020000475(A) 申请公布日期 2002.01.05
申请号 KR20000048121 申请日期 2000.08.19
申请人 HITACHI.LTD. 发明人 HORI HIROYUKI;MORO EIJI;SODEYAMA KEN;TABATA AKIFUMI;WATANABE KATSUYUKI
分类号 H04N5/765;H04N5/7826;H04N5/783;H04N5/95;H04N5/956;H04N9/804;H04N9/896;(IPC1-7):H04N5/95 主分类号 H04N5/765
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