发明名称 CURRENT MIRROR CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a current mirror circuit for supplying plural bias currents or bias currents whose current ratio is large in an integrated circuit capable of reducing the occupancy area on arrangement, and reducing current consumption. SOLUTION: Inter-input/output NPN type bi-polar transistors constituting each current mirror circuit unit CM11, CM12, CM14, and CM18 are made the same so that the current mirror circuit units having the minimum number of constituting transistors can be serially connected across plural stage while output currents equal to inputted reference currents can be outputted. Thus, it is possible to allow the current input itself to have double current amplifying effects by adding the reference currents inputted to each stage to the output currents. Therefore, it is possible to constitute the current mirror circuit having the minimum number of constituting transistors capable of outputting binary weighted currents.
申请公布号 JP2001356829(A) 申请公布日期 2001.12.26
申请号 JP20000178466 申请日期 2000.06.14
申请人 FUJITSU LTD;FUJITSU VLSI LTD 发明人 WATAI TAKAHIRO;FUNAKI TETSUJI
分类号 G05F3/26;H03F1/02;H03F3/343;(IPC1-7):G05F3/26 主分类号 G05F3/26
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