发明名称 Method of determining lethality of defects in circuit pattern inspection method of selecting defects to be reviewed and inspection system of circuit patterns involved with the methods
摘要 From the coordinate data of defects detected on the circuit patterns, the areas where the defects belong are identified. The sizes of the defects detected are compared with the data to determine the lethality to thereby determine the lethality of the defects. Further, the severity of the defects is calculated from the sizes of the defects to thereby select the review object in the descending order of the severity.Thereby, when inspecting the circuit patterns on a semiconductor wafer or the like, the lethality of the defects can automatically be determined even though the review is not carried out, enhancing the efficiency of the inspection. To perform the review with efficiency, the defects to be reviewed are automatically selected, while the quality of the inspection itself is maintained.
申请公布号 US6334097(B1) 申请公布日期 2001.12.25
申请号 US19990225513 申请日期 1999.01.06
申请人 HITACHI, LTD. 发明人 YOSHITAKE YASUHIRO;SHIBA MASATAKA;SHIMODA ATSUSHI
分类号 G01B11/24;G01N21/88;G01N21/94;G01N21/956;H01L21/02;H01L21/66;(IPC1-7):G06F11/32 主分类号 G01B11/24
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