发明名称 |
Phase locked loop arrangement in which VCO frequency is a fraction of reference frequency |
摘要 |
In a phase locked loop arrangement of a frequency synthesiser, a signal outputted from a voltage controlled oscillator is locked to a reference oscillator. A phase detector is arranged so that the frequency of the reference oscillator is a multiple of the frequency of the voltage controlled oscillator, which significantly reduces the phase noise emitted by the voltage controlled oscillator.
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申请公布号 |
US6333679(B1) |
申请公布日期 |
2001.12.25 |
申请号 |
US20000590374 |
申请日期 |
2000.06.09 |
申请人 |
TELEFONAKTIEBOLAGET LM ERICSSON (PUBL) |
发明人 |
ERIKSSON ROBERT |
分类号 |
H03L7/091;H03L7/20;(IPC1-7):H03L7/085 |
主分类号 |
H03L7/091 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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