发明名称 REDUNDANCY CIRCUITRY FOR PROGRAMMABLE LOGIC DEVICES WITH INTERLEAVED INPUT CIRCUITS
摘要 Redundant circuitry is provided for a programmable logic device that uses an interleaved input multiplexer circuit arrangement. The programmable logic device has at least one row of logic regions and has multiple columns, each of which contains one of the interleaved input multiplexers and one of the logic regions. A set of conductors associated with the row of logic regions is used to convey signals between the logic regions. Each interleaved logic region distributes logic signals from the conductors in the row to two adjacent logic regions. Bypass circuitry is provided in each column for bypassing the interleaved input multiplexer and logic region in that column. If a defect is detected in a column during testing of the device, the manufacturer can repair the device using the bypass circuitry to bypass that column. Spare logic is provided to replace the circuitry lost when a defective column is bypassed.
申请公布号 EP0983549(B1) 申请公布日期 2001.12.12
申请号 EP19980923566 申请日期 1998.05.20
申请人 ALTERA CORPORATION (A DELAWARE CORPORATION) 发明人 JEFFERSON, DAVID, E.;REDDY, SRINIVAS, T.
分类号 H03K19/173;G06F11/20;(IPC1-7):G06F11/20 主分类号 H03K19/173
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