发明名称 |
TIMING CONTROL MEANS FOR AUTOMATIC COMPENSATION OF TIMING UNCERTAINTIES |
摘要 |
The present invention relates to the reducing timing uncertainties in high-performance digital circuitry and more specifically, to a timing control means and a method for minimizing timing uncertainties due to skew and jitter. A means for the compensation of timing errors in multiple channel electronic devices comprising at least one register having a plurality of channels comprises: a clock for providing a clock signal; a reference signal generator for generating reference signals for deskewing the registers; wherein for each said register a corresponding feedback loop is associated for the relative alignment of register's timing, the feedback loop comprising a means for detecting a deviation from a predetermined level of probability of reading by said register a desired symbol on a boundary of two reference channel symbols in a sequence and a set of delay means which uses the detected values of probability to generate a feedback signal. The invention is preferably implemented in a self calibrated receiver and a self calibrating transmitter. Also, the invention can be employed in a digital interface between two items or within a circuit where there is a requirement for tight timing control such as requirement for a low skew between the channels of a register. |
申请公布号 |
WO0190864(A2) |
申请公布日期 |
2001.11.29 |
申请号 |
WO2001RU00202 |
申请日期 |
2001.05.22 |
申请人 |
ABROSIMOV, IGOR ANATOLIEVICH |
发明人 |
ABROSIMOV, IGOR ANATOLIEVICH;DEAS, ALEXANDER, ROGER |
分类号 |
H04L25/02;G06F1/04;G06F1/10;G11C7/10;G11C7/22;H03L7/081;H04L7/00;H04L7/02;H04L7/033;H04L25/14 |
主分类号 |
H04L25/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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