发明名称 ADDRESS CONVERTER, INTERLEAVER AND DE-INTERLEAVER
摘要 An interleaver and a de-interleaver of a small scale and a low power consumption. An address converter (ACON) includes three counters (CNT1, CNT2 and CNT3) corresponding to first to third ranks, and the outputs (DO11, DO12 and DO13) of the individual counters (CNT1, CNT2 and CNT3) are inputted to lookup tables (LUT1, LUT2 and LUT3). A clock (CK1) of a predetermined period is inputted to the counter (CNT3) so that numerical values "0" to "3" are repeatedly outputted. A carry-out (CO3), as outputted in synchronism with the output "0" of the counter (CNT3), is inputted as the clock (CK2) to the counter (CNT2) so that the counter (CNT2) outputs the numerical values "0" to "4" repeatedly. A carry-out (CO2), as outputted in synchronism with the output "0" of the counter (CNT2), is inputted as the clock (CK3) to the counter (CNT1) so that the counter (CNT1) outputs the numerical values "0" to "15" repeatedly.
申请公布号 WO0191308(A1) 申请公布日期 2001.11.29
申请号 WO2001JP04283 申请日期 2001.05.22
申请人 YOZAN INC.;FUKUI, MASATAKA;SUZUKI, KUNIHIKO;ZHOU, CHANGMING 发明人 FUKUI, MASATAKA;SUZUKI, KUNIHIKO;ZHOU, CHANGMING
分类号 H03M13/27;(IPC1-7):H03M13/27;H04L1/00 主分类号 H03M13/27
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