发明名称 |
Low distortion logic level translator |
摘要 |
An apparatus comprising a first circuit and a second circuit. The first circuit may be configured to generate a differential intermediate signal in response to a differential input signal. The second circuit may be configured to generate one or more output signals in response to said differential intermediate signal.
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申请公布号 |
US6323683(B1) |
申请公布日期 |
2001.11.27 |
申请号 |
US19990384510 |
申请日期 |
1999.08.27 |
申请人 |
CYPRESS SEMICONDUCTOR CORP. |
发明人 |
KATIKANENI PRADEEP |
分类号 |
H03K19/0185;(IPC1-7):H03K19/017 |
主分类号 |
H03K19/0185 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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