发明名称 |
Memory read amplifier circuit with high current level discrimination capacity |
摘要 |
A memory read amplifier circuit includes at least one memory cell to be read and a bit line connected thereto, a first pre-charge amplifier circuit connected to the bit line. A first cascode circuit is connected between a supply voltage and the memory cell for providing a first current to the memory cell. The memory read amplifier circuit also includes at least one reference memory cell and a reference bit line connected thereto, and a second pre-charge amplifier circuit connected to the reference bit line. A second cascode circuit is connected between the supply voltage and the reference memory cell for providing a second current to the reference memory cell. A differential comparator circuit having a first input is connected to the control terminal of the first cascode circuit for receiving a first voltage based upon the first current, and a second input connected to the control terminal of the second cascode circuit for receiving a second voltage based upon the second current. The differential comparator circuit compares the first and second voltages for providing a logic value relegates to a state of the memory cell to be read.
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申请公布号 |
US6320808(B1) |
申请公布日期 |
2001.11.20 |
申请号 |
US20000686632 |
申请日期 |
2000.10.11 |
申请人 |
STMICROELECTRONICS S.R.L. |
发明人 |
CONTE ANTONINO;GAIBOTTI MAURIZIO |
分类号 |
G11C7/06;(IPC1-7):G11C7/00 |
主分类号 |
G11C7/06 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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