DELAY SYNCHRONIZING LOOP CIRCUIT AND DELAY SYNCHRONIZING METHOD

摘要

PROBLEM TO BE SOLVED: To provide a delay synchronizing loop circuit and a delay synchronizing method for correcting the duty cycle of a clock signal. SOLUTION: The delay synchronizing loop circuit is linked to a duty cycle corrector for correcting the duty cycle of an external clock signal. A first delay synchronizing circuit generates a first clock signal by delaying the external clock signal just for first prescribed time in response to the output signal of the duty cycle corrector and a feedback clock signal. A second delay synchronizing circuit generates a second clock signal by delaying the external clock signal just for second prescribed time in response to the inverted signal of the output signal of the duty cycle corrector and the inverted signal of the feedback clock signal. A waveform mixer generates an internal clock signal to be synchronized with the rising edge of the first clock signal and the falling edge of the second clock signal. A compensation delay equipment generates the feedback clock signal by delaying the internal clock signal just for third prescribed time. Thus, the jitter of the internal clock signal is decreased.