| 摘要 |
<p>The method and system for controlling refresh of a plurality of dynamic random access memory (DRAM) cells (116a...116n) in a data processing system is disclosed. The method and system comprises of providing at least one valid bit (106) to control the refresh of at least one row of DRAM cells (116a...116n) and providing a set of commands by a software program to control the at least one valid bit (106). Accordingly, a system and method in accordance with the present invention allows for software control of a DRAM refresh to reduce power consumption in a data processing system. In a system and method in accordance with the present invention, a plurality of valid bits are provided, each valid bit allows for a group of DRAM cells (116a...116n) to suppress the refresh operation when a refresh is not needed. Each of the valid bits (106) controls the refresh of all cells in a row of DRAM cells (116a...116n) and all cells of a memory location are contained in one row. A system and method in accordance with the present invention utilizes a set of commands to set or clear a valid bit (106), which allows the software to control the refresh. The plurality of valid bits are preferably implemented using the DRAM cells (116a...116n) but without providing a refresh mechanism.</p> |
