METHOD FOR FABRICATING STACKED DOUBLE POLYSILICON/MOS CAPACITOR USING SiGe INTEGRATION

摘要

PURPOSE: A method for fabricating stacked double polysilicon/mos capacitor using SiGe integration is provided to improve capacitance per unit area. CONSTITUTION: A region of a first conductivity-type(12) is formed in a surface of a semiconductor substrate(10). A gate oxide is formed on the semiconductor substrate overlaying the region of first conductivity-type. A first polysilicon layer(18) is formed at least on the gate oxide layer and the first polysilicon layer is doped with an N or P-type dopant. A dielectric layer is formed on the first polysilicon layer. A second polysilicon layer(22) is formed on the dielectric layer and the second polysilicon layer is doped with the same or different dopant as the first polysilicon layer.