发明名称 Multi-stage signal amplifying circuit
摘要 In cases where a direct-current offset occurs in a differential signal output from a differential signal amplifier when a differential input signal is differentially amplified in a series of differential signal amplifiers, a direct-current offset component amplified is included in a differential signal output from a particular differential signal amplifier. To suppress the direct-current offset component, the differential signal is, at first, differentially amplified in a pair of transistors of a detecting amplifier, the direct-current offset component is extracted in a low-pass filter from the differential signal amplified, and compensating currents produced according to the direct-current offset component are input to a differential signal amplifier preceding to the particular differential signal amplifier to adjust the direct-current offset component of the differential signal to zero. Because the pair of transistors of the detecting amplifier inevitably have a high input impedance, the differential signal can be directly received in the detecting amplifier, so that the low-pass filter can be formed on a minimized layout area without considering its input impedance. Therefore, a multi-stage signal amplifying circuit can be manufactured on a small layout area while preventing a voltage level of the differential signal from exceeding an input dynamic range of the differential signal amplifiers.
申请公布号 US6313704(B1) 申请公布日期 2001.11.06
申请号 US20000632269 申请日期 2000.08.03
申请人 MITSUBISHI DENKI KABUSHIKI KAISHA 发明人 MARUYAMA TAKAYA;SATOH HISAYASU
分类号 H03F3/34;H03F3/45;(IPC1-7):H03F3/45;H03L5/00 主分类号 H03F3/34
代理机构 代理人
主权项
地址