| 摘要 |
PROBLEM TO BE SOLVED: To provide a layout method for semiconductor integrated circuit in which integration of semiconductor chip can be enhanced while shortening the design period, by providing a processing step for performing automatic placement and routing of basic cells allowed to be placed in an automatic layout area including an area between megamacros by providing the basic cells additionally with information for allowing placement in an area prohibiting placement of basic cell except the megamacro. SOLUTION: Areas prohibiting placement of basic cell is generated to include all megamacros at step S15 and basic cells allowed to be placed in an automatic layout area of the area prohibiting placement of basic cell are selected among all basic cells at step S17. Subsequently, the basic cells allowed to be placed are placed in the automatic layout areas of the area prohibiting placement of basic cell, and other basic cells are placed in the basic cell placement area at step S18.
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