发明名称 Semiconductor integrated circuit arrangement fabrication method
摘要 To realize etching with a high selection ratio and a high accuracy in fabrication of an LSI, the composition of dissociated species of a reaction gas is accurately controlled when dry-etching a thin film on a semiconductor substrate by causing an inert gas excited to a metastable state in a plasma and a flon gas to interact with each other and selectively obtaining desired dissociated species.
申请公布号 US6309980(B1) 申请公布日期 2001.10.30
申请号 US20000564754 申请日期 2000.05.04
申请人 HITACHI, LTD. 发明人 TOKUNAGA TAKAFUMI;OKUDAIRA SADAYUKI;MIZUTANI TATSUMI;TAGO KAZUTAMI;KAZUMI HIDEYUKI;YOSHIOKA KEN
分类号 H01L21/302;H01L21/3065;H01L21/311;H01L21/70;H01L21/768;H01L21/77;(IPC1-7):H01L21/00 主分类号 H01L21/302
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