| 摘要 |
PROBLEM TO BE SOLVED: To provide a DLL circuit for performing stable delay control with small power consumption. SOLUTION: This DLL circuit consists of a delay circuit (1) which delays a reference clock signal (S2) on the basis of a delay control signal and generates a delay clock signal, a sampling circuit (5) for outputting a pulse corresponding to one among n (n is an integer of >=2) pulses of the delay clock signal as a 1st clock signal (N3), a phase comparator circuit (8) which defines the 1st clock signal as a 1st comparison input signal (N5) and the reference clock signal as a 2nd comparison input signal, compares the 1st comparison input signal with the 2nd comparison input signal in phases and outputs a phase difference, and a delay control circuit (12) for generating the delay control signal (14) on the basis of the phase difference from the phase comparator circuit and outputting the signal (14) to the delay circuit. |
