| 摘要 |
Memory devices having architectures permitting the application of a voltage differential across alternate bitlines facilitate identifying and locating shorts within the memory device with particular reference to flash memory devices. The memory devices include a first plurality of selective coupling devices coupled between a first plurality of bitlines and a first variable potential node. The memory devices further include a second plurality of selective coupling devices coupled between a second plurality of bitlines and a second variable potential node. The first plurality of selective coupling devices are responsive to a first control signal to selectively provide electrical communication between the first plurality of bitlines and the first variable potential node. The second plurality of selective coupling devices are responsive to a second control signal to selectively provide electrical communication between the second plurality of bitlines and the second variable potential node. Each variable potential node provides two or more potential states. By applying the voltage differential across alternate bitlines, measuring the current leakage induced by the voltage differential, and comparing the current leakage to a predetermined threshold leakage value, shorts within the memory device are identified. Repetition of the procedure at various levels, such as the device level, block level, packet level or bitline level, can be used to not only identify the existence of a short, but to also locate the short with desired specificity.
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