| 摘要 |
A semiconductor capacitance device comprising a first semiconductor capacitive element (30) having a first voltage dependency factor K1 (<0), a second semiconductor capacitive element (32) having a second voltage dependency factor K2 (>0) with a gradient sign inverse to the first voltage dependency factor K1, and wiring layers (24, 28) connecting the first and second capacitive elements either in parallel or in series. The first capacitive element (30) has a first doped polysilicon layer (14) of N-type and a second doped polysilicon layer (18) of N-type placed across an interposed dielectric layer (16). The second capacitive element (32) has the first doped polysilicon layer (14) of N-type and a third doped polysilicon layer (20) of P-type placed across the interposed dielectric layer (16). When the effective areas of the first and second capacitive elements (30) and (32) are defined as S1 and S2, the capacitance per unit area of each element (30) and (32) facing the dielectric layer as Co, and the potential applied as E, the total combined capacitance C becomes:Since the signs of K1 and K2 are inverse to each other, the voltage dependency of the total combined capacitance C is reduced.
|
