| 摘要 |
A method of fabricating integrated circuits utilizing dual damascene processing when a soft insulative material, such as a polymer, is used. Vertical and horizontal edges of via and conductive line openings are protected from degradation during a second etching step by, prior to the second etching, depositing a hard mask material on each insulative material layer to protect the horizontal edges and depositing a spacer material to protect the vertical edges.
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