ERROR CORRECTION AND DESCRAMBLE CIRCUIT, REPRODUCING DEVICE PROVIDED WITH ERROR CORRECTION AND DE-SCRAMBLE CIRCUIT, AND METHOD FOR PERFORMING ERROR CORRECTION AND DE-SCRAMBLE PROCESSING

摘要

PROBLEM TO BE SOLVED: To provide an error correction and de-scramble circuit which can perform high-speed data transfer with fewer power consumption, a reproducing device provided with such a circuit, a error correction and de-scramble method. SOLUTION: ECC layout block data reproduced from a recording medium are demodulated, and are once stored by an SDRAM 12. Error correction processing by a product code is performed only the number of times determined in a different direction on the stored ECC layout block data by an ECC circuit 13a, respectively. User data among the data which the error correction processing in an SDRAM 12 has been completed are read for the transfer to a host side by a DMA 11 and de-scramble processing is applied by an SCR circuit 13b before transferring to the read data.