DATA PATH DESIGN FOR MULTIPLE ELECTRON BEAM LITHOGRAPHY SYSTEM

摘要

A data path design for a multiple electron beam lithography system is disclosed herein. This data path design addresses the requirement for supplying a large number of parallel pattern data streams, one to each of the multiple writing beams in the lithography system. The data path can be described as a collection of embedded processors custom designed ASICs, SDRAMs, glue logic, and software. A block diagram of this implementation includes an Ethernet link (910), which is used by a controller (906) to bring in pattern data from an outside source and the Pattern Library Storage (PLS) (902), which communicates to the controller (906) through the high speed data bus (904).