发明名称 Circuit arrangement comprising a chain of capacitors
摘要 A circuit structure includes a chain (1) consisting of double-layer capacitors (2). Modules (3) are connected parallel to the double-layer capacitors. Impedance in the modules is reduced if the voltage above one of the double-layer capacitors exceeds a preset value. This causes excess-voltages on the double-layer capacitors to be effectively suppressed.
申请公布号 AU3534601(A) 申请公布日期 2001.08.27
申请号 AU20010035346 申请日期 2001.01.15
申请人 EPCOS AG 发明人 BERND STAIB;MICHAEL KAMMERER
分类号 H02J7/00;H02J7/02 主分类号 H02J7/00
代理机构 代理人
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