| 摘要 |
A method of fabricating an integrated circuit with a gate structure comprised of an oxide/polysilicon/metal stack. The method includes forming the gate structure by using a metal plug as a hard mask in place of a hard mask produced using photolithography. Thus, linewidth limitations of conventional photolithography do not apply. Specifically, the method includes providing a pattern over a semiconductor substrate; partially filling the pattern with a polysilicon material such that a trench is left in the polysilicon material, and filling the trench in the polysilicon material with metal to form a plug. After forming the materials, excess materials are removed leaving the gate structure.
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