| 摘要 |
PURPOSE: To provide a semiconductor device which is operated at a high speed under low power source voltage, in which output of each gate is confirmed even in a standby state, and a delay time is not affected by a frequency of an input signal. CONSTITUTION: Trs Q1-Q8 constituting a multi-stage inverter are made low threshold voltage because of low-voltage operation. When an input node A is 'L' in a standby state, Trs Qn1, Qp1 of high threshold voltage are connected to Tr Q2, Q3, Q6, Q8 which are cut off. In a standby state, the Trs Qn1, Qp1 for power cut are cut off by chip selecting signals CS, /CS, a sub-threshold current flowing in the Trs Q1-Q8 is interrupted. At this time, since the Trs Q1, Q4, Q5, Q8 are not cut off, the output potential of each inverter is established. The number of transistors required for each transistor for power cut is decided according to a frequency of an input signal, so that only one transistor from among the transistors connected to the Trs Qn1, Qp1 respectively will be turned on simultaneously.
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