| 摘要 |
PURPOSE: A bus line driver circuit is provided to reduce a power dissipation by driving a bus line so as to have a voltage swing width of a less magnitude and to secure a rapid driving speed by making a node be charged or discharged. CONSTITUTION: A PMOS transistor(MP1) has a gate connected to receive an input signal, a source connected to an A node and a drain connected to a C node. An NMOS transistor(MN1) has a gate connected to receive the input signal. The source and drain of the transistor(MN1) are connected to C and B nodes, respectively. An inverter inverts a signal of the C node to drive a bus line with the inverted signal. An inverter inverts an output signal of the inverter. An NMOS transistor(MN2) has a gate connected to receive an output signal of the inverter and is connected between VDD and the A node so as to make a voltage swing width of the C node have a level between "VDD-Vtn" and "Vtp". A PMOS transistor(MP3) has a gate connected to receive an output signal of the inverter and is connected between the B node and GND so as to make a voltage swing width of the C node have a level between "VDD-Vtn" and "Vtp". In order to rapidly drive the bus line with a next inverted input signal, an NMOS transistor(MN3) charges the A node and a PMOS transistor(MP2) discharges the B node.
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