发明名称 EFFICIENT ARRANGEMENT OF OUTPUT DRIVERS OF HIGH SPEED SEMICONDUCTOR MEMORY DEVICE
摘要 PURPOSE: An efficient arrangement of output drivers of a high speed semiconductor memory device is provided to increase system ability and yields by coinciding an output time point of data through input/output pads. CONSTITUTION: Each of output drivers(OD0 to OD3) is arranged between input/output pads corresponding to one of ground pads(VSS1,VSS2). An output driver(OD2) is arranged between the ground pad(VSS2) and an input/output pad(DQ2) corresponding to the output driver(OD2). The output driver(OD3) is arranged between the ground pad(VSS2) and an input/output pad(DQ3) corresponding to the output driver(OD3). Namely, the input/output pad(DQ0), the output driver(OD0), the ground pad(VSS1), the output driver(OD1), and the input/output pad(DQ1) are arranged in a line and sequentially. And, the input/output pad(DQ2), the output driver(OD2), the ground pad(VSS2), the output driver(OD3), and the input/output pad(DQ3) are arranged in a line and sequentially. At this time, the ground pad(VSS1) is for supplying a ground voltage with the output drivers(OD1,OD0), and the ground pad(VSS2) is for supplying a ground voltage with the output drivers(OD2,OD3).
申请公布号 KR20010057919(A) 申请公布日期 2001.07.05
申请号 KR19990061336 申请日期 1999.12.23
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 SONG, HO SEONG
分类号 G11C11/40;(IPC1-7):G11C11/40 主分类号 G11C11/40
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