发明名称 RIMM(RAMBUS INLINE MEMORY MODULE) APPARATUS EMBEDDED WITH PLL(PHASE LOCKED LOOP)
摘要 PURPOSE: A RIMM(Rambus Inline Memory Module) apparatus embedded with a PLL(Phase Locked Loop) is provided to increase a memory recognition capacity by reinforcing a clock signal attenuation using the PLL. CONSTITUTION: The RIMM apparatus comprises a plurality of Rambus DRAM(RDRAM1-RDRAMN:D1-DN), and a phase locked loop(35) is located between random Rambus DRAMs. The PLL is located between a clock(RCTM/N,LCTM/N) to master from a clock generator and a clock(LCFM/N,RCFM/N) from master to the clock generator. And, a left paddle(36) and a right paddle(37) output data and a clock signal and a control signal to the plurality of Rambus DRAM. And there are data signals(LDQA,LDQB, RDQA,RDQB) and row bus(LROW,RROW) signals and column bus(LCOL,RCOL) signals and clock signals(clock to master, clock from master) and a series of clock input signals(LSCK,RSCK) and a series of commands(LCMD,RCMD) applied from a control register and a logic reference threshold voltage(Vref) and a series of input signals(Sin) inputted from the first Rambus DRAM(D1) to the Nth Rambus DRAM(DN) and an output signal(Sout) from the Nth Rambus DRAM between two paddles.
申请公布号 KR20010053687(A) 申请公布日期 2001.07.02
申请号 KR19990054154 申请日期 1999.12.01
申请人 HYNIX SEMICONDUCTOR INC. 发明人 SHIN, MYEONG SU;SONG, YEONG JUN
分类号 G11C11/40;(IPC1-7):G11C11/40 主分类号 G11C11/40
代理机构 代理人
主权项
地址