发明名称 MANUFACTURING METHOD OF WIRING BOARD
摘要 <p>PROBLEM TO BE SOLVED: To solve the problem, where nickel of a nickel-plated layer is moved the surface of a gold-plated layer for diffusion, and the electrode of a semiconductor element cannot be connected firmly and electrically to a wiring layer. SOLUTION: A wiring board 4, where a wiring layer 2 is formed in an insulating substrate 1, is dipped into a nickel-plated bath using nickel salt and hydrazine as the metal supply source and the reduction agent, respectively, a nickel- plated layer 6 consisting of nickel particles with an average grain size of 20 nm or more is deposited onto the exposure surface of the wiring layer 2 of the wiring board 4, the wiring board 4 where the nickel-plated layer 6 is deposited is dipped into a gold-plating bath, and a gold-plated layer 7 is deposited on the surface of the nickel-plated layer 6.</p>
申请公布号 JP2001177220(A) 申请公布日期 2001.06.29
申请号 JP19990356313 申请日期 1999.12.15
申请人 KYOCERA CORP 发明人 TSUKAMOTO HIROSHI
分类号 H05K3/18;H01L23/12;H05K3/24;(IPC1-7):H05K3/18 主分类号 H05K3/18
代理机构 代理人
主权项
地址