BIT LINE FORMATION METHOD

摘要

PROBLEM TO BE SOLVED: To reduce the capacitive coupling between bit lines. SOLUTION: The bit line formation method for forming the bit lines of a DRAM memory array includes a process that covers the DRAM memory array for forming an interlayer dielectric 201, a process where the interlayer dielectric 201 is etched for forming a trench 203 in the interlayer dielectric 201 and the trench 203 collectively forms bit-line patterns for tapering the side wall of the trench 203, and a process that deposits an electrically conductive substance for forming the bit lines.