发明名称 GAIN CONTROL CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a gain control circuit that can reduce DC offset fluctuation in a base band signal at gain control. SOLUTION: In the configuration of the gain control circuit 10 where an output of a gain control amplifier 2 is negatively fed back to an input side sbutractor 5 via an amplifier 3 and an integrator 4 so as to decrease a DC gain, by controlling a gm (transconductance) of the integrator 4, in a way that the DC gain is constant in response to the gain control of the gain control amplifier 2, the DC offset fluctuation of a gain control circuit 10 can be reduced. Furthermore, this gain control circuit 10 can suitably be applicable to a base band section of a reception circuit of a wireless communication unit.
申请公布号 JP2001156566(A) 申请公布日期 2001.06.08
申请号 JP19990337755 申请日期 1999.11.29
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 ARAYASHIKI MAMORU
分类号 H03G3/12;(IPC1-7):H03G3/12 主分类号 H03G3/12
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