摘要 |
A frequency synthesizer has a voltage controlled oscillator comprising a voltage controlled capacitor having a first terminal and a second terminal. A positive control voltage is applied to the first terminal of the voltage controlled capacitor and a negative control voltage is applied to the second terminal of the voltage controlled capacitor, causing the varactor to operate in a reverse biased state. A circuit for generating a negative control voltage is provided in a phase-locked loop circuit. The circuit includes a negative DC generator for generating a negative DC voltage from an AC signal, and a programmable variable attenuator for selectably attenuating the negative control voltage.
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