DEVICE OF GENERATING DELAY LOCKED LOOP(DLL) CLOCK FOR DOUBLE LOCKING USING RING OSCILLATOR

摘要

PURPOSE: A device of generating a delay locked loop(DLL) clock for double locking using a ring oscillator is provided to reduce the size of the device, to produce fast the DLL clock having a small jitter, and to control the whole jitter only through a fine delay stage when noises occur. CONSTITUTION: In a block diagram of a delay locked loop(DLL) clock generator, a delay model(210) delays a clock(clk) by the difference between the clock(clk) and a data output signal and produces a delay model clock signal(clk_d). A controller(230) responds to the clock signal(clk), an enable signal(en) and the delay model clock signal(clk_d). The controller(230) produces a control signal and an internal clock signal to produce a delay locked loop clock signal(dll_clk). A first delay stage(250) delays the clock(clk) roughly responding to the control signal and the internal clock signal. A second delay stage(270) delays finely the signal delayed by the first delay stage(250) and produces the delay locked loop clock signal(dll_clk).