| 摘要 |
<p>PROBLEM TO BE SOLVED: To provide a voltage controlled piezoelectric oscillator configured on a multi-layered board that can prevent its frequency variable width from being reduced due to parasitic capacitance caused in a voltage controlled oscillator circuit wiring and the oscillator multi-layered board and between reference level wires on a set side board. SOLUTION: Parasitic capacitance formed between the reference level wiring 103 and a corresponding signal wiring 100 is added to variable capacitive elements of circuit elements 101 in parallel and a partial hollow layer 104 at least vertically below the corresponding signal wiring 100 is placed in a multi- layered board 102 in which the voltage controlled piezoelectric oscillator is configured.</p> |
