发明名称 |
SENSE AMPLIFIER FOR MEMORY CELL |
摘要 |
PROBLEM TO BE SOLVED: To obtain a sense circuit sensing a logical state of a memory cell in which a reading time is minimized. SOLUTION: This sense circuit has a first circuit branch corresponding to an array circuit path and a second circuit branch corresponding to a reference cell circuit path. An additional load and a current generating circuit are enabled in the first circuit path so that they are driven during a predecoding interval in operation so that voltage discriminated by a sense input of a comparator of the sense circuit is substantially equivalent to voltage of a reference signal established by the reference cell circuit path of a reference input of a comparator of the sense circuit. When an address is decoded, the additional load circuit is disabled so that a sense input of the comparator is varied to voltage indicating a logical state stored in a memory cell. |
申请公布号 |
JP2001110194(A) |
申请公布日期 |
2001.04.20 |
申请号 |
JP19990321518 |
申请日期 |
1999.10.06 |
申请人 |
MICRONICS INTERNATL CO LTD |
发明人 |
KUEN RON CHAN;CHUN SHUN HYUN;KEN HYUI CHEN;I RON RII;IN SHAN RIU;REI RIN WAN |
分类号 |
G11C16/06 |
主分类号 |
G11C16/06 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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