发明名称 FLAT LINE CONNECTOR
摘要 PROBLEM TO BE SOLVED: To minimize deterioration of power transmission characteristics and power loss against dimension deviation. SOLUTION: An upper layer is composed of a first short-circuiting metal layer 3 with a slit and a first strip line 4 locating one terminal inside the slit of this first short-circuiting metal layer 3, and a middle layer is composed of a flat matching element 5 positioned almost in the center of the middle layer and a ground metal layer 6 positioned around this matching element 5. Besides, a lower layer is constituted mostly similar to the upper layer. Since the first strip line 4 and a second strip line 8 are mutually efficiently electromagnetically coupled through the matching element 5 by resonance of the matching element 5 based on this configuration, even when the dimension deviation occurs, the characteristics deterioration of impedance matching or the like can be suppressed to a minimum. Besides, since the matching element 5 is shielded being surrounded with serial conductors of the same potential composed of respective metal layers 3, 6 and 7 and through holes 9 and 10, the leak of power from the matching element 5 to a peripheral space can be effectively suppressed.
申请公布号 JP2001102819(A) 申请公布日期 2001.04.13
申请号 JP19990276017 申请日期 1999.09.29
申请人 TOYOTA CENTRAL RES & DEV LAB INC 发明人 IIZUKA HIDEO
分类号 H01P3/08;H01P5/02 主分类号 H01P3/08
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