发明名称 IMPROVED MULTIPLICATION CIRCUIT
摘要 <p>A multiplication circuit includes a shifter receiving the multiplicand and selectively providing a first output which is a zero or a shifted multiplicand. A function generator also receives the multiplicand and selectively provides a second output which is a zero, non-shifted multiplicand, shifted multiplicand or a ones complement of the multiplicand, based upon the multiplier. The first output from the shifter and second output from the function generator are added to provide the product of the multiplier and the multiplicand.</p>
申请公布号 WO2001025899(A1) 申请公布日期 2001.04.12
申请号 EP2000009482 申请日期 2000.09.26
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