发明名称 |
SEMICONDUCTOR INTEGRATED CIRCUIT |
摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit in which a test realizing a maximum delay easily and surely without having any effect on an actual circuit can be carried out. SOLUTION: A semiconductor integrated circuit 2 comprising an actual circuit 1 including a multi-stage logic circuit is provided with a test circuit 3 having circuitry identical to that of a logic circuit constituting the critical path P1 of the actual circuit 1.
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申请公布号 |
JP2001091591(A) |
申请公布日期 |
2001.04.06 |
申请号 |
JP19990268141 |
申请日期 |
1999.09.22 |
申请人 |
SONY CORP |
发明人 |
IDEOKA YOSHIHIKO;NOGUCHI MASAYOSHI;YAMAOKA KEISUKE |
分类号 |
G01R31/28;H01L21/822;H01L27/04;(IPC1-7):G01R31/28 |
主分类号 |
G01R31/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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