发明名称 |
Method for integrated circuit layout |
摘要 |
<p>In a method for fabricating an integrated circuit on a semiconductor substrate in which various types of circuit modules for the transfer of data and control signals in the circuit are interconnected via a bus conductor system, the bus conductor system is first produced on the semiconductor substrate. The circuit modules are then floor planned on the bus conductor system in accordance with their specific requirements on the transit times of the incoming and outgoing signals and connected to the bus conductor system.</p> |
申请公布号 |
EP1089204(A2) |
申请公布日期 |
2001.04.04 |
申请号 |
EP20000120129 |
申请日期 |
2000.09.20 |
申请人 |
TEXAS INSTRUMENTS DEUTSCHLAND GMBH |
发明人 |
STADLER, WALTER |
分类号 |
G06F17/50;H01L21/822;H01L21/82;H01L27/04;(IPC1-7):G06F17/50 |
主分类号 |
G06F17/50 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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