READING METHOD OF SEMICONDUCTOR MEMORY AND SEMICONDUCTOR MEMORY

摘要

PROBLEM TO BE SOLVED: To provide a semiconductor memory realizing high speed read operation. SOLUTION: The semiconductor memory comprises a capacitor 10 inserted into a bit line 3 between a memory cell 5 for bringing a precharged bit line 3 to a potential corresponding to stored data and an inverter 8 for detecting the potential of the bit line 3, a dummy memory cell 12 for causing transition of a precharged dummy bit line 11 to a different potential, first and second analog switches 14, 15 for switching connection of the bit line 3 and the dummy bit line 11 with the capacitor 10, a third analog switch 16 for short-circuiting the input and output of the inverter 8, and an amplification control circuit 17 for releasing short circuit before the potential of the bit line 3 reaches the threshold potential of the inverter 8 and controlling the first and second analog switches 14, 15 to connected the unconnected signal line with the capacitor 10.