发明名称 |
DATA EXTRACTING CIRCUIT AND DATA MULTIPLYING FORMAT CONVERTING CIRCUIT |
摘要 |
PROBLEM TO BE SOLVED: To make a circuit scale small by temporarily holding status information in two random access memories and status information or alarm information on a specific frame in another random access memory, and repeating subsequent extracting operation and writing and reading operation for the status information cyclically among the three random access memories. SOLUTION: A random access memory 1-3 and a random access memory 1-4 have planes switched with the write control signal of the alarm information. The random access memory 1-3 enters a write enable state when the logical level of a write enable signal is '0', so the random access memory 1-4 enters a write enable state when the logical level of the write control signal of the alarm information is '1'. The status information or alarm information S/A multiplied in an Nth frame among 1st multiple frames are written to the memory 1-3 when the logical level of the write control signal of the alarm information is '0'.
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申请公布号 |
JP2001077868(A) |
申请公布日期 |
2001.03.23 |
申请号 |
JP19990253982 |
申请日期 |
1999.09.08 |
申请人 |
FUJITSU LTD |
发明人 |
KOBAYASHI DAISUKE;KOYANAGI MASAKATSU;HASHINAGA KENJI;SHIGEOKA YUMIKO |
分类号 |
H04J3/00;H04L13/08;(IPC1-7):H04L13/08 |
主分类号 |
H04J3/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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