发明名称 |
SEMICONDUCTOR STORAGE DEVICE |
摘要 |
PROBLEM TO BE SOLVED: To assure defect analysis and to shorten defect analyzing time by generating surely auto-power-down control signal in a short time by electrical control from the outside of a semiconductor memory, and suppressing forcedly an auto-power-down function. SOLUTION: This device is provided with an auto-power-down control signal generating circuit 10 generating an auto-power-down control signal APDC which has a 'L' level directly after applying power source and has a 'H' level by control from a control terminal at a point of desired time, and a word line selection signal generating circuit 20 which performs ANDing of an auto-power- down signal APD generated based on an address transition detecting signal and the auto-power-down control signal to prescribed a drive period of a word line selecting a memory cell of a memory cell array, performs ANDing of this OR output and an address decoding signal, and selects and controls a word line by this AND output.
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申请公布号 |
JP2001076499(A) |
申请公布日期 |
2001.03.23 |
申请号 |
JP19990253208 |
申请日期 |
1999.09.07 |
申请人 |
TOSHIBA MICROELECTRONICS CORP;TOSHIBA CORP |
发明人 |
TAKAHASHI HIDEKI;KAWAGUCHI TAKAYUKI |
分类号 |
G11C11/413;G11C11/401;G11C29/00;G11C29/12;(IPC1-7):G11C29/00 |
主分类号 |
G11C11/413 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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