发明名称 METHOD FOR MANUFACTURING STACKED CHIP PACKAGE USING WEDGE BONDING METHOD
摘要 PURPOSE: A method for manufacturing a stacked chip package is provided to form an electrode pad having a fine pitch in a semiconductor chip and to reduce the semiconductor chip in size, by using a wedge bonding method. CONSTITUTION: A lead frame is prepared wherein a lower chip(10) and an upper chip(20) are sequentially stacked on a die pad(42). After the first fine metal wire is wedge-bonded to an electrode pad(14,24) of the upper chip by using a capillary, the first fine metal wire is wedge-bonded to a lead(46) of the lead frame. After the second fine metal wire is wedge-bonded to an electrode pad of the lower chip by using the capillary, the second fine metal wire is wedge-bonded to the lead of the lead frame. A package body(50) is formed by encapsulating the upper and lower chips, the first and second fine metal wires and a lead part connected by the first and second fine metal wires, with molding resin. The lead projected to the exterior of the package body is bent and cut to be adaptable for a shape of an external electronic apparatus.
申请公布号 KR20010019421(A) 申请公布日期 2001.03.15
申请号 KR19990035809 申请日期 1999.08.27
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 SONG, GEUN HO
分类号 H01L23/12 主分类号 H01L23/12
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