| 摘要 |
PURPOSE: A circuit for driving a ferroelectric random access memory(FRAM) is provided to minimize the chip size and to maximize the chip's driving capability making an efficient layout. CONSTITUTION: In a circuit for driving an FRAM, a main wordline driver(91) produces first and second control signals to activate one of the two local wordline drivers(95,97) and also produces third and fourth control signals to de-activate the other of the two local drivers(95,97). The first and second control signals may be either R1 and R2 or L1 and L2. If the first and second signals are R1 and R2, the third and fourth signals become L1 and L2 and vice versa. When the first and second control signals are R1 and R2, the second local wordline driver(97) is activated, when L1 and L2, the first local wordline driver(95) is activated. Here, the phases of the first and second control signals are opposite. Each of first and second cell arrays(93,99) consists multiple unit cells of two transistors and two ferroelectric capacitors. A local X decoder(101) produces an amount of control signal corresponding to the split wordlines comprising each cell array, and puts the control signal to both the first and second local wordline drivers(95,97). The main wordline driver(91) produces a control signal to determine choose one of the first and second local wordline drivers(95,97). The chosen local wordline driver is activated and transmits the activation signal from the local X decoder(101) to the pair of wanted split wordlines.
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