| 摘要 |
PURPOSE: An address transition detector is provided to reduce a lay-out area that the detector occupies and to improve an overall characteristic of the detector by reducing a current. CONSTITUTION: An address transition detector includes the first and second detection portions(10,20) and an output portion(40). The first detection portion detects that an address signal transitions from a logic low to a logic high. The second detection portion detects that the address signal transitions from a logic high to a logic low. The output portion outputs an address transition detection signal in response to output signals of the first and second detection portions. The output portion has the first and second output units(41,42) and an inverter(INV8). The first output unit outputs a logic high when the output signals of the first and second detection portions are logically low. The second output unit outputs a logic low except when the output signals of the first and second detection portions are logically low. The inverter inverts output signals of the first and second output units.
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